Document Type

Thesis - Open Access

Award Date

1986

Degree Name

Master of Science (MS)

Department

Electrical Engineering

Abstract

The Vector Processor is a device designed for the purpose of economically achieving maximum speed in the computer execution of a group of common scientific and engineering calculations. Each element of the vector, the individual data item, may be a number, a logical value, or a character. A vector's elements must be all of the same type. A vector may have meaning in its own right, or it may be part of an array, a row or a column of elements. Manipulations and operations with vectors have been used by mathematicians, scientists and engineers for centuries in procedures for analysis and design. The IBM PC is chosen as the General Purpose Processor and the Vector Controller is designed to coordinate the activities of a group of components called Math Coprocessors with that of the IBM PC. The two processors cooperate by sharing the buses and ignoring each other’s instructions. The bus sharing is managed by the interface signals. The vector operations are done in the Math Coprocessors, by loading the data elements sequentially into the Math Coprocessors and executing an instruction in parallel. The sequential and the parallel operations are controlled by the Vector Controller which recognizes the vector instructions. In the absence of instructions involving vector quantities, the Vector Controller has one of the Math Coprocessors connected to the General Purpose Processor as in the conventional architecture. This allows for maximum speed in executing ordinary arithmetic operations. When a vector instruction appears, it is decoded by the Vector Controller and appropriate action taken. The effect of these actions is to load the elements of the required vectors sequentially from Memory into the Math Coprocessors, do the required operations simultaneously, and then write the results out sequentially to Memory. This simultaneous operation on a number of data elements is the key to the speed of this processor. The ensuing chapters describe the hardware and software requirements for the design. Understanding of the hardware design requires the knowledge of the architecture of the 8088 and the 8087 processors. The next two chapters, Chapter II and Chapter III, explain the architecture of the 8088 CPU and the 8087 Math Coprocessor, in brief. Chapter IV describes System Clock and Bus Cycles giving an idea system. Chapter V and detail the hardware Controller. Finally, about timing requirements of the subsequent Chapters explain in implementation of the Vector the software requirements are described in Chapter IX, with Conclusions in Chapter X.

Library of Congress Subject Headings

Vector analysis -- Computer programs
Computer arithmetic and logic units

Format

application/pdf

Number of Pages

142

Publisher

South Dakota State University

Rights

No Copyright - United State
http://rightsstatements.org/vocab/NoC-US/1.0/

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